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Espressif Systems /ESP32-C6 /EXTMEM /L2_CACHE_DATA_MEM_POWER_CTRL

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Interpret as L2_CACHE_DATA_MEM_POWER_CTRL

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (L2_CACHE_DATA_MEM_FORCE_ON)L2_CACHE_DATA_MEM_FORCE_ON 0 (L2_CACHE_DATA_MEM_FORCE_PD)L2_CACHE_DATA_MEM_FORCE_PD 0 (L2_CACHE_DATA_MEM_FORCE_PU)L2_CACHE_DATA_MEM_FORCE_PU

Description

Cache data memory power control register

Fields

L2_CACHE_DATA_MEM_FORCE_ON

The bit is used to close clock gating of L2-Cache data memory. 1: close gating, 0: open clock gating.
L2_CACHE_DATA_MEM_FORCE_PD

The bit is used to power L2-Cache data memory down. 0: follow rtc_lslp, 1: power down
L2_CACHE_DATA_MEM_FORCE_PU

The bit is used to power L2-Cache data memory up. 0: follow rtc_lslp, 1: power up

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Register License

Copyright 2024 Espressif Systems (Shanghai) PTE LTD

Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License. You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data